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Monday, February 11, 2008

Non-Parity vs. Parity

As data moves through your computer (e.g. from the CPU to the main Memory), the possibility of errors can occur . . . particularly in older 386 & 486 machines. Parity error detection was developed to notify the user of any data errors. By adding a single bit to each byte of data, this bit is responsible for checking the integrity of the other 8 bits while the byte is moved or stored. Once a single-bit error is detected, the user receives an error notification; however, parity checking only notifies, and does not correct a failed data bit. If your SIMM module has 3, 6, 9, 12, 18, or 36 chips then it is more than likely Parity.

Logic Parity
Also known as Parity Generators, or Fake Parity, these modules were produced by some
manufacturers as a less expensive alternative to True Parity. Fake parity modules "fool" your
system into thinking parity checking is being done. This is accomplished by sending the parity signal the machine looks for, rather than using an actual parity bit. In a module using Fake Parity, you will NOT be notified of a Memory error, because it is really not being checked. The result of these undetected errors can be corrupted files, wrong calculations, and even corruption of your hard disk. If you need Parity modules be cautious of suppliers with bargain prices; they may be substituting useless Fake Parity.
These modules are just like Parity modules without the extra chips. There are no Parity chips in
Apple® Computers, later 486, and most Pentium® class systems. The reason for this is simply
because Memory errors are rare, and a single bit error will most likely be harmless.If your SIMM module has 2, 4, 8, 16, or 32 chips, then it is more than likely Non-Parity. Always match the new Memory with what is already in your system. To determine if your system requires parity, count the number of small, black, IC chips on one of your modules.

ECC (Error Correction Code)
Error Correction Code modules are an advanced form of Parity detection often used in servers and critical data applications. ECC modules use multiple Parity bits per byte (usually 3) to detect doublebit errors. They also will correct single-bit errors without creating an error message. Some systems which support ECC can use a regular Parity module by using the Parity bits to make up the ECC code. However, a Parity system cannot use a true ECC module.

FPM (Fast Page Mode) 1987 50ns Burst Timing: 5-3-3-3
Fast Page Mode has traditionally been the most common DRAM. A "page" is the section of Memory available within a row address. Accessing Memory is like looking up information in a book. You choose the page, then FPM gets information from that page. FPM DRAMs need only to specify the row address once for accesses within the same page addresses. Successive accesses to the same page of Memory only require a column address to be selected, which saves time in accessing the Memory.

EDO (Extended Data Output) 1995 50ns Burst Timing: 5-2-2-2
Extended Data Output DRAM is an improvement over FPM design, and used in Non-Parity
configurations in Pentium® machines or higher. If supported by your motherboard, EDO shortens the Read cycle between the main Memory and the CPU, thereby dramatically increasing throughput. EDO chips allow the CPU to access Memory 10 to 20 percent faster. EDO DRAMs hold the data valid even after the signal which "strobes" the column address goes inactive. This allows faster CPU's to manage time more efficiently; i.e., while the EDO DRAM is retrieving an instruction for the microprocessor, the CPU can perform other tasks without concern that the data will become invalid. Do not use EDO in systems don't support it, or mix EDO with FPM as serious problems will result.

PC66 SDRAM (Synchronous DRAM) 1997 66 MHz Burst Timing: 5-1-1-1
SDRAM is the fastest DRAM technology available. It uses a clock to synchronize the signal input and output. The clock coordinates with the CPU clock so both are in synch. The CPU "knows" when operations are to be completed and data will become available, freeing the processor for other operations. The use of a clock allows for extremely fast consecutive read and write capability over FPM and EDO DRAMs.The clock is the main speed consideration with SDRAMs; therefore, SDRAMs are measured in megahertz (e.g. 66 MHz or 100 MHz). SDRAM increases the speed and performance of the system.

SRAM (Static RAM) Burst Timing: 3-1-1-1
SRAM (Static RAM) stores its data in capacitors don't require constant recharging to retain their
data; consequently, this type of RAM is faster than DRAM which results in a higher cost. Speed is approximately 8ns to 20ns - as opposed to 60ns to 80ns for DRAM.

L2 Cache
Level 2 or L2 cache, mem. is external to the microprocessor. In general, L2 cache mem. (SRAM),
also called the secondary cache, resides on a separate chip from the microprocessor. Although,
more and more microprocessors are including L2 caches into their architectures.

DDR SDRAM (Double Data Rate SDRAM) 2000 266 MHz
Many other alternate methods of Memory access are in development. One of the most promising is Double Data Rate (DDR) SDRAM. Like SDRAM before it, DDR SDRAM will interleave Memory access so that several Memory accesses can be performed simultaneously. DDR SDRAM executes twice for each tick of the Memory bus, effectively doubling the system bus speed. Currently, DDR Memory is only used in high-end graphics cards, but it will almost certainly make its way down to the main Memory of the computer soon.Interleave: The process of taking data bits (singularly or in bursts) alternately from two or more mem. pages (on an SDRAM) or devices (on a mem. card or subsystem).

RDRAM (Rambus® DRAM) 1999 800 MHz
System Memory bandwidth is more important now than ever before. With the increase in processor performance, multimedia and 3D graphics, high bandwidth Memory is essential to sustain system performance. The transition to Rambus® DRAM (RDRAM®) - with a Memory performance gain up to 300% over the current SDRAM technology is nothing short of revolutionary!

Refresh Rate
Memory module is made up of electrical cells. The refresh process recharges these cells, which are arranged on the chips in rows. The refresh rate refers to the number of rows that must be
refreshed. The common refresh rates are 1K, 2K, 4K and 8K. Some specialty designed DRAMs
feature self refresh technology, which enables the components to refresh on their own -
independent from the CPU or external consumption, and it is commonly used in notebook computers and laptop computer.

Gold vs. Tin/Lead Contacts
For best contact reliability, you should match the contact material of the SIMM sockets on your
motherboard. Mixing metal Types may lead to contact corrosion, especially in high humidity
environs. Visually inspect the sockets; if they are gold, buy SIMMs with gold contacts. If they are tin, buy SIMMs with tin/lead contacts. However, this is not always a critical issue, and either kind usually works. Most Pentium® boards have tin contacts, and almost all SIMMs manufactured today use a tin/lead alloy instead of gold.

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